1. Field of the Invention
This invention relates to a method of preparing thin film resistors used together with semiconductor devices.
2. Description of the Related Art
Japanese Examined Patent Publication (Kokoku) 2-18561 (corresponding U.S. Pat. No. 4,392,992) discloses a method of constituting a thin film resistor having a composition consisting of Cr, Si and nitrogen and used in combination with semiconductor devices. The thin film resistor formed of Cr, Si and nitrogen can be controlled, with regard to its rate of change of resistance value, at an approximately constant plus, minus or zero value within an ordinary temperature range during use of semiconductor devices, by controlling the composition and/or a heat treatment thereafter, and the method of preparing the resistor is easy. Therefore, it has become widely used, in electronic devices, etc.
For example, on a semiconductor substrate, a thick oxide film for element separation and a MOSFET (metal-oxide semiconductor field-effect-transistor) are formed. Thereafter a CVD--SiO.sub.2 film as a layer insulation film is deposited, followed by the formation of a CrSiN film thereon. In order to prepare a resistor having a proper width and length so as to obtain a desired resistance value, a photoresist is applied on the CrSiN film, and is exposed and developed by well known methods so as to form a photoresist pattern with a resistor shape. Using the photoresist pattern as an etching mask, CrSiN film is etched with a wet HF-based etching liquid to form a desired CrSiN thin film resistor. After removing the photoresist on the CrSiN film, a metal electrode of Al, etc., is formed by spattering, and thereafter, an Al electrode is formed using a well known photoetching technique.
In the conventional method of etching the CrSiN film by the HF-based etching liquid, however, the etching speed of the CVD--SiO.sub.2 layer insulation film under the CrSiN film using the HF-based etching liquid is the same or faster than that of the CrSiN film, so that the CVDSiO.sub.2 layer insulation film under the CrSiN film is etched and a cavity is formed at the edge portion of the CrSiN thin film resistor when Al electrode wiring is formed. Therefore the reliability factor is lowered.